公司可提供in-house设计，以及ARM基于0.13μm技术平台的整套单元库，同时还提供芯原微电子的9T 整套单元库，包括0.18μm及0.13μm技术平台上的标准单元、输入输出接口及存储器编译器。

此外，公司还提供0.5μm/0.35μm混合信号、0.5μm BCD和0.5μm 高压工艺的标准单元输入输出单元库，及0.18μm混合信号、BCD 高压、NVM、MCU及0.153μm Enhance CMOS等工艺标准单元库，帮助客户实现最佳的芯片尺寸和有效的成本。这些单元库都提供强大的ESD保护，并且都支持Cadence和Synopsys公司的ASIC SOC的设计流程。

所有这些单元库为客户提供了库实施方案的选择。公司为方便客户和单元库供应商之间的联系提供支持，以确保客户产品的成功流片，并更快地将产品推向市场。

Libraries

Tech.Node	Library Type	Available Libraries
0.11μm Eflash	6T Library	6 Track Standard Cell Library, PMK, Inline I/O, Stagger I/O, Memory Compiler
0.13μm G	7 Track Metro Library	7 Track Standard Cell Library, PMK, Inline I/O, Stagger I/O, Memory Compiler
	9 Track Library	9 Track Standard Cell Library, Inline I/O, Stagger I/O, Memory Compiler
0.153μm CMOS EN	7 Track & 9 Track Library	7 Track & 9 Track Standard Cell Library
0.18μm G	7 Track & 9 Track Library	7 Track & 9 Track Standard Cell Library, Inline I/O, Stagger I/O, DUP I/O,RF I/O, Memory Compiler
0.18μm CMOS EN	9 Track & 11 Track&13 Track Library	9 Track & 11 Track &13 Track Standard Cell Library, Memory Compiler
0.18μm BCD	9 Track & 13 Track Library	9 Track & 13 Track Standard Cell Library, Memory Compiler
0.25μm BCD	12 Track Library	12 Track Standard Cell Library
0.35μm Mix	9 Track Library	9 Track Standard Cell Library, Inline I/O, Stagger I/O, Memory Compiler
0.35μm Logic	9 Track Library	9 Track Standard Cell Library
0.5μm MS	9 Track Library	9 Track Standard Cell Library, Inline I/O
0.5μm BCD	9 Track Library	9 Track Standard Cell Library, Inline I/O

 

PDKs

Tech.Node	Available PDKs Based On Cadence Design Tools
0.5μm	Mixed-Signal,Mixed-Signal High Cap.;BCD;High Voltage;0.5μm FE 0.35μm BE;0.5μm FE 0.35μm BE High Cap.
0.35μm	Mixed-Signal
0.25μm	MS/BCD
0.18μm	Mixed-Signal/RF/High Voltage/FLASH/EEPROM/BCD/CMOS EN
0.153μm	CMOS EN
0.13μm	Mixed-Signal/RF
0.11μm	ULL/Eflash

 

Tech.Node	Available PDKs Based On Empyrean Design Tools-Aether
0.5μm	Mixed-Signal
0.35μm	Mixed-Signal